[Crib-list] Speaker: MARTIN HERBORDT (Boston University) -- COMPUTATIONAL RESEARCH in BOSTON SEMINAR -- Friday, April 4, 2008 (fwd)

Shirley Entzminger daisymae at math.mit.edu
Fri Apr 4 09:58:30 EDT 2008


T O D A Y . . .


 			COMPUTATIONAL RESEARCH in BOSTON SEMINAR

Date:		FRIDAY, APRIL 4, 2008
Time:		12:30 PM
Location:	Building 32, Room 144  (Stata Center)

(Pizza and beverages will be provided at 12:15 PM.)


TITLE:		High Performance Computing Using FPGAs


SPEAKER:	MARTIN HERBORDT  (Boston University)


ABSTRACT:

The current effervescence in computer architecture is leading to serious 
(re)examination of FPGAs as augmentations to CPU-based processors.  And 
not just on the I/O bus, as has been done for many years, but also on the 
FSB and even on the processor chip itself.  This interest has largely been 
motivated by reported per-node accelerations of 100x or more.  The unique 
issues in "programming" FPGAs, however, have left most application writers 
waiting for better tools before giving them serious consideration.

In this talk we first review the state of the art of FPGA-based high 
performance computing.  The bulk of the talk then consists of highlights 
from our research in developing FPGA applications for Bioinformatics and 
Computational Biology.  This has two parts.  The first is on methods of 
algorithm development, answering the question "How we know when we have 
succeeded?"  This part doubles as a discussion of various effective FPGA 
computational modes.  The second part is a case study:  discrete event 
simulation of molecular dynamics (DMD).  DMD uses simplified discretized 
models, enabling simulations to be advanced by event rather than 
time-step, with a resulting performance increase of several orders of 
magnitude.  Our primary result here is a microarchitecture for DMD that 
processes events with a throughput equal to a small multiple of the FPGA's 
clock, resulting in a hundred-fold speed-up over serial implementations. 
Of particular interest is that this result appears difficult to achieve 
using alternative acceleration methods, independent of system cost.  We 
end the talk by considering what must happen to make FPGA-based systems 
broadly effective for HPC, and the likelihood of that occurring.

****************************************************************************

Massachusetts Institute of Technology
Cambridge, MA 02139


http://www-math. mit.edu/crib

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